TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 142

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

9.1 Configuration
Example :After checking high-frequency clock oscillation stability with TC4 and 3, switching to the NORMAL1 mode
9.3.9.2
Table 9-9 Setting Time in High-Frequency Warm-Up Counter Mode
PINTTC4:
VINTTC4:
bility is obtained. Before starting the timer, set SYSCR2<XEN> to 1 to oscillate the high-frequency clock.
When a match between the up-counter and the timer register (TTREG4, 3) value is detected after the timer
is started by setting TC4CR<TC4S> to 1, the counter is cleared by generating the INTTC4 interrupt
request. After stopping the timer in the INTTC4 interrupt service routine, clear SYSCR2<SYSCK> to 0 to
switch the system clock from the low-frequency to high-frequency, and then SYSCR2<XTEN> to 0 to
stop the low-frequency clock.
(SLOW1 → SLOW2 → NORMAL2 → NORMAL1)
High-Frequency Warm-Up Counter Mode
In this mode, the warm-up period time from a stop of the high-frequency clock fc to the oscillation sta-
SET
LD
LD
LD
DI
SET
EI
SET
CLR
CLR
CLR
RETI
DW
(TTREG4, 3 = 0100H)
Minimum time Setting
:
:
16 µs
(SYSCR2).7
(TC3CR), 63H
(TC4CR), 05H
(TTREG3), 0F800H
(EIRE). 5
(TC4CR).3
(TC4CR).3
(SYSCR2).5
(SYSCR2).6
PINTTC4
:
:
Page 130
: SYSCR2<XEN>
: Sets TFF3=0, source clock fc, and 16-bit mode.
: Sets TFF4=0, and warm-up counter mode.
: Sets the warm-up time.
: IMF
: Enables the INTTC4.
: IMF
: Starts the TC4 and 3.
: Stops the TC4 and 3.
: SYSCR2<SYSCK>
: SYSCR2<XTEN>
: INTTC4 vector table
(The warm-up time depends on the oscillator characteristic.)
(Switches the system clock to the high-frequency clock.)
(Stops the low-frequency clock.)
←
←
0
1
Maximum time Setting
(TTREG4, 3 = FF00H)
←
←
←
1
4.08 ms
0
0
TMP86FS28DFG