S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 260
S9S12XS256J0CAL
Manufacturer Part Number
S9S12XS256J0CAL
Description
MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XS64CAE.pdf
(738 pages)
Specifications of S9S12XS256J0CAL
Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12XS256J0CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S12XS256J0CAL
Manufacturer:
FREESCALE
Quantity:
20 000
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S12XE Clocks and Reset Generator (S12XECRGV1)
8.5
All reset sources are listed in
priorities.
260
.
FSTWKP=1
Instruction
Oscillator Clock
PLL Clock
Core Clock
Resets
FSTWKP=1
Instruction
Oscillator Clock
PLL Clock
Core Clock
SCME=1
SCME=1
CPU resumes program execution immediately
Illegal Address Reset
Figure 8-19. Fast Wake-up from Full Stop Mode: Example 1
Figure 8-20. Fast Wake-up from Full Stop Mode: Example 2
Clock Monitor Reset
Low Voltage Reset
Power on Reset
External Reset
Reset Source
STOP
Table
Oscillator Disabled
IRQ Interrupt FSTWKP=0 SCMIE=1
STOP
S12XS Family Reference Manual, Rev. 1.11
IRQ Service
8-16. Refer to MCU specification for related vector addresses and
Interrupt
Table 8-16. Reset Summary
IRQ service
Oscillator Disabled
CPU resumes program execution immediately
Self-Clock Mode
Osc Startup
Power Saving
STOP
Interrupt
Self-Clock Mode
PLLCTL (CME=1, SCME=0)
Clock Quality Check
IRQ service
Frequent Uncritical
Local Enable
Instructions
None
None
None
None
SCM Interrupt
STOP
Interrupt
Instructions Possible
Frequent Critical
Freescale Semiconductor
IRQ service
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