S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 682

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
A.3.1.14
Erase Verify D-Flash for a given number of words N
A.3.1.15
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary, because programming across a row boundary requires extra steps. The D-
Flash programming time is specified for different cases (1,2,3,4 words and 4 words across a row boundary)
at a 40MHz bus frequency. The typical programming time can be calculated using the following equation,
whereby N
crossed.
The maximum programming time can be calculated using the following equation
A.3.1.16
Typical D-Flash sector erase times are those expected on a new device, where no margin verify fails occur.
They can be calculated using the following equation.
Maximum D-Fash sector erase times can be calculated using the following equation.
The D-Flash sector erase time on a new device is ~5ms and can extend to 20ms as the flash is cycled.
682
t
t check
t eradf
t eradf
=
350
≈
≈
⋅
≈
w
--------------------------- -
f NVMBUS
5025
20100
(
t
840
denotes the number of words; BC=0 if no boundary is crossed and BC=1 if a boundary is
t
dpgm
Erase Verify D-Flash Section (FCMD=0x10)
D-Flash Programming (FCMD=0x11)
Erase D-Flash Sector (FCMD=0x12)
dpgm
1
⋅
+
⋅
=
------------------------ -
f NVMOP
=
N W
------------------------ -
f NVMOP
⎛
⎝
⎛
⎝
(
(
15
15
1
)
1
+
⋅
+
(
--------------------------- -
f
(
NVMBUS
54 N
56 N
+
⋅
⋅
+
700
1
w
3300
w
)
S12XS Family Reference Manual, Rev. 1.11
)
+
+
⋅
(
(
--------------------------- -
f NVMBUS
16 BC
16 BC
⋅
--------------------------- -
f NVMBUS
⋅
⋅
1
)
)
)
1
)
⋅
⋅
------------------ -
f
------------------ -
f
NVMOP
NVMOP
1
1
W
⎞
⎠
⎞
⎠
is given by .
+
+
⎛
⎝
⎛
⎝
(
(
460
460
+
+
(
(
640 N
840 N
⋅
⋅
W
W
)
)
+
+
(
(
500 BC
500 BC
⋅
⋅
)
Freescale Semiconductor
)
)
)
⋅
⋅
-------------------- -
f
-------------------- -
f
NVMBUS
NVMBUS
1
1
⎞
⎠
⎞
⎠