Supply Voltage: 0.9 to 3.6 V
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10-Bit Analog to Digital Converter
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Two Comparators
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Memory
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On-Chip Debug
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Low-Voltage/Low-Power
One-cell mode supports 0.9–1.8 V operation
Two-cell mode supports 1.8–3.6 V operation
Built-in dc-dc converter with 1.8 –3.3 V output (65 mW max) for
use in one-cell mode; can supply external devices
Typical sleep mode current < 0.1 µA; retains state and RAM-
contents over full supply range; fast wakeup
2 built-in brown-out detectors cover sleep and active modes
Up to 300 ksps
Up to 23 external inputs
External pin or internal VREF (no external capacitor required)
Built-in temperature sensor
External conversion start input option
Autonomous Burst Mode with 16-bit automatic averaging
accumulator
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current (< 0.5 µA)
Up to 23 Capacitive Touch Sense inputs
4352 bytes internal data RAM (256 + 4K)
64 kB bytes Flash; In-system programmable in 1024-byte
sectors; Full read/write/erase functionality over the entire
supply range
External memory interface (multiplexed address/data)
On-chip debug circuitry facilitates full speed, non-intrusive in-
system debug (no emulator required)
C2CK/RST
VDD/DC+
GND/DC-
XTAL3
XTAL4
VBAT
GND
Power Net
Converter
Programming
C2D
Reset/PMU
DC/DC
Power On
Hardware
Analog
Power
Debug /
XTAL1
XTAL2
Wake
Reset
Single/Dual Battery, 0.9-3.6 V, 64 kB, smaRTClock, 10-Bit ADC MCU
VREG
smaRTClock
Low Power
24.5 MHz
Precision
Oscillator
Oscillator
Oscillator
Oscillator
Copyright © 2008 by Silicon Laboratories
External
20 MHz
Controller Core
Digital
Power
System Clock
64k Byte ISP Flash
Circuit
Configuration
Program Memory
4096 Byte XRAM
CIP-51 8051
256 Byte SRAM
SYSCLK
Engine
CRC
SFR
Bus
Internal
High-Speed 8051 µC Core
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Digital Peripherals
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Clock Sources
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Ultra-Small Package Options
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Temperature Range: –40 to +85 °C
VREF
CP1, CP1A
Timers 0,
SMBus
SPI 0,1
UART
1, 2, 3
Analog Peripherals
6-bit
IREF
10-bit
300ksps
ADC
Digital Peripherals
PCA/
WDT
Port I/O Configuration
Pipe-lined instruction architecture; executes 70% of instructions
in 1 or 2 system clocks
25 MIPS peak throughput with 25 MHz clock
Expanded interrupt handler
24 port I/O; All 5 V tolerant with programmable drive strength
Hardware enhanced UART, SPI and SMBus™ serial ports
available concurrently
Low power 32-bit smaRTClock (0.5 uA) operates down to 0.9V
Four general purpose 16-bit counter/timers
16-bit programmable counter array (PCA) with six capture/com-
pare modules and watchdog timer:
Precision internal oscillators: 24.5 MHz with ±2% accuracy sup-
ports UART operation; spread-spectrum mode for reduced EMI
Low power internal oscillator: 20 MHz
External oscillator: Crystal, RC, C, CMOS clock
smaRTClock oscillator: 32.768 kHz crystal or self-oscillate
Can switch between clock sources on-the-fly; useful in power
saving modes
32-pin QFN (5x5 mm)
32-pin LQFP (9x9 mm)
CP0, CP0A
Crossbar Control
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External
VREF
Comparators
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8, 9, 10, 11, or 16-bit PWM
Rising/falling edge capture
Frequency output
Software timer
M
A
U
X
+
Crossbar
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Decoder
Priority
IREF0
Sensor
VREF
Temp
VDD
GND
Drivers
Drivers
Drivers
Port 0
Port 1
Port 2
C8051F930
P0.0/VREF
P0.1/AGND
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVSTR
P0.7/IREF0
P1.0/AD0
P1.1/AD1
P1.2/AD2
P1.3/AD3
P1.4/AD4
P1.5/AD5
P1.6/AD6
P1.7/AD7
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/ALE
P2.5/RD
P2.6/WR
P2.7/C2D
11.11.2008