C8051F930-GQ Silicon Laboratories Inc, C8051F930-GQ Datasheet - Page 119

IC 8051 MCU 64K FLASH 32-LQFP

C8051F930-GQ

Manufacturer Part Number
C8051F930-GQ
Description
IC 8051 MCU 64K FLASH 32-LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F930-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
24
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 23x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F930DK
Minimum Operating Temperature
- 40 C
On-chip Adc
23-ch x 10-bit
No. Of I/o's
24
Ram Memory Size
4KB
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1478 - PLATFORM PROG TOOLSTCK F920,F930336-1477 - PLATFORM PROG TOOLSTCK F920,F930336-1473 - KIT DEV C8051F920,F921,F930,F931336-1472 - BOARD TARGET/PROTO W/C8051F930
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1466

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F930-GQ
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
C8051F930-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F930-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F930-GQR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
10.7. EMIF Special Function Registers
The special function registers used by the EMIF are EMI0CN, EMI0CF, and EMI0TC. These registers are
described in the following register descriptions.
SFR Definition 10.1. EMI0CN: External Memory Interface Control
SFR Page = 0x0; SFR Address = 0xAA
Reset
Name
Bit
7:5
4:0
Type
Bit
Unused
Name
PGSEL
R/W
7
0
Unused.
Read = 000b; Write = Don’t Care
XRAM Page Select.
The EMI0CN register provides the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page
of RAM. Since the upper (unused) bits of the register are always zero, the PGSEL
determines which page of XRAM is accessed. When the MSB of PGSEL is set to 1
and the EMIF is configured for one of the two split-modes, 8-bit MOVX instructions
target off-chip memory.
For Example:
If EMI0CN = 0x01, addresses 0x0100 through 0x01FF of on-chip memory will be
accessed.
If EMI0CN = 0x0F, addresses 0x0F00 through 0x0FFF of on-chip memory will be
accessed.
If EMI0CN = 0x11, addresses 0x0100 through 0x01FF of off-chip memory will be
accessed.
If EMI0CN = 0x1F, addresses 0x0F00 through 0x0FFF of off-chip memory will be
accessed.
R/W
0
6
R/W
5
0
R/W
Rev. 1.1
4
0
Function
C8051F93x-C8051F92x
R/W
3
0
PGSEL[4:0]
R/W
2
0
R/W
1
0
R/W
0
0
119

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