M30262F4GP#U7 Renesas Electronics America, M30262F4GP#U7 Datasheet - Page 156
M30262F4GP#U7
Manufacturer Part Number
M30262F4GP#U7
Description
IC M16C/26 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M30262F4GPU3.pdf
(41 pages)
3.M30262F4GPU3.pdf
(241 pages)
Specifications of M30262F4GP#U7
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
M30262F4GP#U7M30262F4GP#D3
Manufacturer:
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Quantity:
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Part Number:
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Part Number:
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Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
M16C/26 Group
UART2 Special Mode Register 4
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
UART2 Special Mode Register 4
Bit 0 of UART2 special mode register 4 (address 0374
) are used to start condition generate bit. When
16
the SCL, SDA output select bit (bit 3 of U2SMR4 register) is “1” and this bit is “1”, then the start condition
is generated.
Bit 1 of UART2 special mode register 4 are used to restart condition generate bit.
When the SCL, SDA output select bit (bit 3 of U2SMR4 register) is “1” and this bit is “1“, then the restart
condition is generated.
Bit 2 of UART2 special mode register 4 are used to stop condition generate bit.
When the SCL, SDA output select bit (bit 3 of U2SMR4 register) is “1” and this bit is “1”, then the stop
condition is generated.
Bit 3 of UART2 special mode register 4 are used to SCL, SDA output select bit.
Functions changed by these bits are shown in table 1.15.17 and figure 1.15.31.
Bit 4 of UART2 special mode register 4 are used to ACK data bit.
When the SCL, SDA output select bit (bit 3 of U2SMR4 register) is “0” and the ACK data output enable bit
(bit 5 of U2SMR4 register) is “1”, then the content of ACK data bit is output to SDA pin.
Bit 5 of UART2 special mode register 4 are used to ACK data output enable bit.
When the SCL, SDA output select bit (bit 3 of U2SMR4 register) is “0” and this bit is “1”, then the content
of ACK data bit is output to SDA pin.
Bit 6 of UART2 special mode register 4 are used to SCL output stop bit.
When this bit is “1”, SCL output is stopped at stop condition detection. (Hi-impedance status).
Bit 7 of UART2 special mode register 4 are used to SCL wait output bit.
When this bit is “1”, SCL output is fixed to "L" at falling edge of 10th bit of clock. When this bit is “0”, SCL
output fixed to “L” is released.
148
Renesas Technology Corp.
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