R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 118
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 81 of 802
6.5.17
Table 6.5
IOINSEL Bit (I/O port input function select bit)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
PDi_j bit in PDi register
Address 018Fh
The IOINSEL bit is used to select the pin level of an I/O port when the PDi_j (j = 0 to 7) bit in the PDi (i = 0 to
7, 10 to 13) register is set to 1 (output mode). When this bit is set to 1, the I/O port input function reads the pin
input level regardless of the PDi register.
Table 6.5 lists I/O Port Values Read by Using IOINSEL Bit. The IOINSEL bit can be used to change the input
function of all I/O ports.
Symbol SDADLY1 SDADLY0 IICTCHALF IICTCTWI IOINSEL
I/O port values read
IICTCHALF I
IICTCTWI I
SDADLY0 SDA digital delay select bit
SDADLY1
IOINSEL
Bit
IOINSEL bit
Symbol
I/O Function Pin Select Register (PINSR)
—
—
—
I/O Port Values Read by Using IOINSEL Bit
b7
0
Reserved bits
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
I/O port input function select bit
2
2
C double transfer rate select bit 0: Transfer rate is the same as the value set with bits
C half transfer rate select bit
b6
0
Oct 30, 2009
Bit Name
b5
0
0
0 (input mode)
Pin input level
b4
0
Set to 0.
0: The I/O port input function depends on the PDi (i =
1: The I/O port input function reads the pin input level
1: Transfer rate is twice the value set with bits CKS0
0: Transfer rate is the same as the value set with bits
1: Transfer rate is half the value set with bits CKS0 to
b7 b6
0 0: Digital delay of 3
0 1: Digital delay of 11
1 0: Digital delay of 19
1 1: Do not set.
0 to 7, 10 to 13) register.
When the PDi_j (j = 0 to 7) bit in the PDi register is
set to 0 (input mode), the pin input level is read.
When the PDi_j bit in the PDi register is set to 1
(output mode), the port latch is read.
regardless of the PDi register.
CKS0 to CKS3 in the ICCR1 register
to CKS3 in the ICCR1 register
CKS0 to CKS3 in the ICCR1 register
CKS3 in the ICCR1 register
b3
0
1
b2
—
0
Port latch value
Function
f1 cycles
f1 cycles
f1 cycles
0
b1
—
0
1 (output mode)
b0
—
0
Pin input level
1
6. I/O Ports
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
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