MC908LK24CPBE Freescale Semiconductor, MC908LK24CPBE Datasheet - Page 416
MC908LK24CPBE
Manufacturer Part Number
MC908LK24CPBE
Description
IC MCU 8BIT 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908LK24CFUE.pdf
(464 pages)
Specifications of MC908LK24CPBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
HC08LK
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
MC908LK24CPBE
Manufacturer:
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Quantity:
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Part Number:
MC908LK24CPBE
Manufacturer:
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Computer Operating Properly (COP)
21.3 Functional Description
Data Sheet
416
INTERNAL RESET SOURCES
(COPRS FROM CONFIG1)
(COPD FROM CONFIG1)
RESET VECTOR FETCH
STOP INSTRUCTION
COPEN (FROM SIM)
NOTE:
COPCTL WRITE
COPCTL WRITE
COP RATE SEL
COP DISABLE
RESET
ICLK
Figure 21-1
The COP counter is a free-running 6-bit counter preceded by a 12-bit
prescaler counter. If not cleared by software, the COP counter overflows
and generates an asynchronous reset after 2
cycles, depending on the state of the COP rate select bit, COPRS, in the
CONFIG1 register. With a 2
ICLK gives a COP timeout period of 174ms. Writing any value to location
$FFFF before an overflow occurs prevents a COP reset by clearing the
COP counter and stages 12 through 5 of the prescaler.
Service the COP immediately after reset and before entering or after
exiting STOP Mode to guarantee the maximum time before the first COP
counter overflow.
Figure 21-1. COP Block Diagram
Computer Operating Properly (COP)
12-BIT COP PRESCALER
shows the structure of the COP module.
COP CLOCK
COP COUNTER
6-BIT COP COUNTER
CLEAR
13
– 2
4
ICLK cycle overflow option, a 47-kHz
MC68HC908LJ24/LK24 — Rev. 2.1
RESET STATUS REGISTER
18
– 2
RESET CIRCUIT
Freescale Semiconductor
4
or 2
13
– 2
4
ICLK
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