MCHC908LK24CFQE Freescale Semiconductor, MCHC908LK24CFQE Datasheet - Page 189
MCHC908LK24CFQE
Manufacturer Part Number
MCHC908LK24CFQE
Description
IC MCU 24K FLASH 8MHZ SPI 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908LK24CFUE.pdf
(464 pages)
Specifications of MCHC908LK24CFQE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LK
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
When the user dedicates a page of FLASH for data storage, and the size
of the data array defined, each call of the EE_WRTIE routine will
automatically transfer the data in the data array (in RAM) to the next
blank block of locations in the FLASH page. Once a page is filled up, the
EE_WRITE routine automatically erases the page, and starts reuse the
page again. In the 128-byte page, an 8-byte control block is used by the
routine to monitor the utilization of the page. In effect, only 120 bytes are
used for data storage. (see
are transparent to the user.
When using this routine to store a 2-byte data array, the FLASH page
can be programmed 60 times before the an erase is required. In effect,
the write/erase endurance is increased by 60 times. When a 15-byte
data array is used, the write/erase endurance is increased by 8 times.
Due to the FLASH page size limitation, the data array is limited from 2
bytes to 15 bytes.
The coding example below uses the $EF00–$EE7F page for data
storage. The data array size is 15 bytes, and the bus speed is
4.9152 MHz. The coding assumes the data block is already loaded in
RAM, with the address pointer, FILE_PTR, pointing to the first byte of the
data block.
PAGE BOUNDARY
PAGE BOUNDARY
Figure 10-10. EE_WRITE FLASH Memory Usage
ONE PAGE = 128 BYTES
Monitor ROM (MON)
Figure
CONTROL: 8 BYTES
F L A S H
DATA ARRAY
DATA ARRAY
DATA ARRAY
10-10). The page control operations
$XX00 OR $XX80
ROM-Resident Routines
Monitor ROM (MON)
Data Sheet
189
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