HD64F3644WV Renesas Electronics America, HD64F3644WV Datasheet - Page 347
HD64F3644WV
Manufacturer Part Number
HD64F3644WV
Description
IC H8/3644 MCU FLASH 80TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD64F3644HV.pdf
(551 pages)
Specifications of HD64F3644WV
Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F3644WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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When clock output mode is selected, SCI3 outputs 8 serial clock pulses. When an external clock is
selected, data is output in synchronization with the input clock.
Serial data is transmitted from the TXD pin in order from the LSB (bit 0) to the MSB (bit 7).
When the MSB (bit 7) is sent, checks bit TDRE. If bit TDRE is cleared to 0, SCI3 transfers data
from TDR to TSR, and starts transmission of the next frame. If bit TDRE is set to 1, SCI3 sets bit
TEND to 1 in SSR, and after sending the MSB (bit 7), retains the MSB state. If bit TEIE in SCR3
is set to 1 at this time, a TEI request is made.
After transmission ends, the SCK
Note: Transmission is not possible if an error flag (OER, FER, or PER) that indicates the data
Figure 10.17 shows an example of the operation when transmitting in synchronous mode.
TDRE
TEND
LSI
operation
User
processing
Serial
clock
Serial
data
Figure 10.17 Example of Operation when Transmitting in Synchronous Mode
reception status is set to 1. Check that these error flags (OER, FER, and PER) are all
cleared to 0 before a transmit operation.
TXI request
Bit 0
Bit 1
TDRE cleared
to 0
Data written
to TDR
1 frame
3
pin is fixed at the high level.
TXI request
Bit 7
Bit 0
Section 10 Serial Communication Interface
Rev. 6.00 Sep 12, 2006 page 325 of 526
Bit 1
1 frame
Bit 6
REJ09B0326-0600
TEI request
Bit 7
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