R4F24268NVRFQV Renesas Electronics America, R4F24268NVRFQV Datasheet - Page 1102
R4F24268NVRFQV
Manufacturer Part Number
R4F24268NVRFQV
Description
MCU 256KB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24268NVRFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R4F24268NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R4F24268NVRFQV
Manufacturer:
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Quantity:
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Section 19 Synchronous Serial Communication Unit (SSU)
Page 1072 of 1372
Note: Hatching boxes represent SSU internal operations.
[1]
[3]
[4]
No
Read received data in SSRDR
Read receive data in SSRDR
RDRF automatically cleared
Overrun error processing
Consecutive data reception?
Clear ORER in SSSR
End reception
End reception
Initial setting
Read SSSR
ORER = 1?
RDRF = 1?
RE = 0
Start
Figure 19.16 Flowchart Example of Data Reception
Yes
Yes
No
(Clock Synchronous Communication Mode)
Yes
No
[2]
[1]
[2], [4] Receive error processing:
[3]
Initial setting:
Specify the receive data format.
When a receive error occurs, execute the designated error
processing after reading the ORER bit in SSSR. After that,
clear the ORER bit to 0. While the ORER bit is set to 1,
transmission or reception is not resumed.
To complete reception:
To complete reception, read receive data after clearing the
RE bit to 0. When reading SSRDR without clearing the RE
bit, reception is resumed.
H8S/2426, H8S/2426R, H8S/2424 Group
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
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