R4F24268NVRFQV Renesas Electronics America, R4F24268NVRFQV Datasheet - Page 1117
R4F24268NVRFQV
Manufacturer Part Number
R4F24268NVRFQV
Description
MCU 256KB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24268NVRFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
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H8S/2426, H8S/2426R, H8S/2424 Group
21.3.1
In the user programming mode, the flash memory can be programmed by the CPU through
execution of software commands. In this mode, the user ROM and data flash can be programmed
without using a ROM programmer with the microcomputer mounted on a system board.
The programming and block erase commands should be executed only in each block area of the
user ROM and data flash.
The user programming mode provides the erase/write 0 mode (EW0 mode). Table 21.4 gives an
overview of the EW0 mode specifications.
Table 21.4 EW0 Mode Specifications
Notes: 1. Make sure that no interrupt (except NMI) or DMA transfer is generated.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Item
Operating mode
Area for storing the programming
control program
Area for executing the
programming control program
Programmable area
Limitations on software
commands
Mode after programming or
erasure
CPU state during automatic
programming or erasure
Flash memory status detection
2. In the user programming mode, the programming control program should be executed
User Programming Mode
in the on-chip RAM or an external area.
Description
•
•
User ROM
The programming control program should be transferred to an
area outside the flash memory (such as RAM) before
execution*
User ROM, data flash
None
Read status register mode
Operating*
•
•
Single-chip mode
On-chip ROM enabled expanded mode
Reading the FMPRSF and FMERSF bits in FLMSTR by a
program.
Executing a read status register command to read the SR7,
SR5, and SR4 bits in the status register.
2
1
Section 21 Flash Memory
Page 1087 of 1372
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