R4F24268NVRFQV Renesas Electronics America, R4F24268NVRFQV Datasheet - Page 515
R4F24268NVRFQV
Manufacturer Part Number
R4F24268NVRFQV
Description
MCU 256KB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24268NVRFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
R4F24268NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
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Manufacturer:
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H8S/2426, H8S/2426R, H8S/2424 Group
9.4
Locate the register information in the on-chip RAM (addresses: H'FFBC00 to H'FFBFFF).
Register information should be located at the address that is multiple of four within the range.
Locating the register information in address space is shown in figure 9.3. Locate the MRA, SAR,
MRB, DAR, CRA, and CRB registers, in that order, from the start address of the register
information. In the case of chain transfer, register information should be located in consecutive
areas as shown in figure 9.3 and the register information start address should be located at the
corresponding vector address to the activation source. Figure 9.4 shows correspondences between
the DTC vector address and register information. The DTC reads the start address of the register
information from the vector address set for each activation source, and then reads the register
information from that start address.
When the DTC is activated by software, the vector address is obtained from: H'0400 +
(DTVECR[7:0] × 2). For example, if DTVECR is H'10, the vector address is H'0420.
The configuration of the vector address is the same in both normal* and advanced modes, a 2-byte
unit being used in both cases. These two bytes specify the lower bits of the register information
start address.
Note: * Not available in this LSI.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Figure 9.3 Correspondence between DTC Vector Address and Register Information
Start address of
register information
Chain transfer
Location of Register Information and DTC Vector Table
MRA
MRA
MRB
MRB
0
CRA
CRA
Lower addresses
1
Four bytes
DAR
DAR
SAR
SAR
2
CRB
CRB
Section 9 Data Transfer Controller (DTC)
3
Register information
Register information
for second transfer
in case of chain
transfer
Page 485 of 1372
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