D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 593
D12332VFC20V
Manufacturer Part Number
D12332VFC20V
Description
IC H8S/2332 MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12332VFC20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12332VFC20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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When use of an external clock is selected, three types of count can be selected: at the rising edge,
the falling edge, and both rising and falling edges.
Some functions differ between channel 0 and channel 1.
Bit 2
CKS2
0
1
Note: * If the count input of channel 0 is the TCNT1 overflow signal and that of channel 1 is the
12.2.5
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
TCSR0
Bit
Initial value :
R/W
TCSR1
Bit
Initial value :
R/W
TCNT0 compare match signal, no incrementing clock is generated. Do not use this setting.
Bit 1
CKS1
0
1
0
1
Timer Control/Status Registers 0 and 1 (TCSR0, TCSR1)
:
:
:
:
R/(W) *
R/(W) *
CMFB
CMFB
Bit 0
CKS0
0
1
0
1
0
1
0
1
7
0
7
0
R/(W) *
R/(W) *
CMFA
CMFA
Description
Clock input disabled
Internal clock, counted at falling edge of φ/8
Internal clock, counted at falling edge of φ/64
Internal clock, counted at falling edge of φ/8192
For channel 0: count at TCNT1 overflow signal *
For channel 1: count at TCNT0 compare match A *
External clock, counted at rising edge
External clock, counted at falling edge
External clock, counted at both rising and falling edges
6
0
6
0
R/(W) *
R/(W) *
OVF
OVF
5
0
5
0
ADTE
R/W
—
—
0
1
4
4
Rev.4.00 Sep. 07, 2007 Page 561 of 1210
OS3
OS3
R/W
R/W
3
0
3
0
OS2
OS2
R/W
R/W
2
0
2
0
REJ09B0245-0400
OS1
R/W
OS1
R/W
1
0
1
0
(Initial value)
OS0
R/W
OS0
R/W
0
0
0
0
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