D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 1186
D12332VFC25
Manufacturer Part Number
D12332VFC25
Description
MCU 3V 0K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of D12332VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25
HD6412332VFC25
HD6412332VFC25
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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TSR2—Timer Status Register 2
Rev.4.00 Sep. 07, 2007 Page 1154 of 1210
REJ09B0245-0400
Bit
Initial value
Read/Write
Note:
*
Can only be written with 0 for flag clearing.
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
TCNT counts down
TCNT counts up
—
—
6
1
Underflow Flag
R/(W)*
TCFU
0
1
5
0
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
Overflow Flag
R/(W)*
TCFV
0
1
4
0
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
—
—
3
0
—
—
2
0
TGR Input Capture/Output Compare Flag B
H'FFF5
R/(W)*
TGFB
0
1
1
0
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
TGR Input Capture/Output Compare Flag A
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
TGFB = 1
0
1
R/(W)*
TGFA
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt
• When DMAC is activated by TGIA interrupt
• When 0 is written to TGFA after reading
[Setting conditions]
• When TCNT = TGRA while TGRA is
• When TCNT value is transferred to TGRA by
while DISEL bit of MRB in DTC is 0
while DTA bit of DMABCR in DMAC is 1
TGFA = 1
functioning as output compare register
input capture signal while TGRA is functioning
as input capture register
TPU2
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