D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 943
D12332VFC25
Manufacturer Part Number
D12332VFC25
Description
MCU 3V 0K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of D12332VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25
HD6412332VFC25
HD6412332VFC25
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Notes: 1. Follow the program/erase algorithms when making the time settings.
22.3
Although both the F-ZTAT and mask ROM versions fully meet the electrical specifications listed
in this manual, there may be differences in the actual values of the electrical characteristics,
operating margins, noise margins, and so forth, due to differences in the fabrication process, the
on-chip ROM, and the layout patterns.
If the F-ZTAT version is used to carry out system evaluation and testing, therefore, when
switching to the mask ROM version the same evaluation and testing procedures should also be
conducted on this version.
2. Programming time per 128 bytes. (Indicates the total time during which the P bit is set
3. Time to erase one block. (Indicates the time during which the E bit is set in FLMCR1.
4. Maximum programming time
5. The maximum number of writes (N) should be set as shown below according to the
6. For the maximum erase time (t
7. Minimum number of times for which all characteristics are guaranteed after rewriting
8. Reference value for 25°C (as a guideline, rewriting should normally function up to this
9. Data retention characteristic when rewriting is performed within the specification range,
Usage Note
The wait time after P bit setting (z) should be changed as follows according to the
Number of writes (n)
in flash memory control register 1 (FLMCR1). Does not include the program-verify
time.)
Does not include the erase-verify time.)
actual set value of z so as not to exceed the maximum programming time (t
number of writes (n).
wait time after E bit setting (z) and the maximum number of erases (N):
(Guarantee range is 1 to minimum value).
value).
including the minimum value.
t
1 ≤ n ≤ 6
7 ≤ n ≤ 1000
1 ≤ n ≤ 6
t
P
E
(max) =
(max) = Wait time after E bit setting (z) × maximum number of erases (N)
i=1
Σ
N
wait time after P bit setting (z)
z = 30 µs
z = 200 µs
z = 10 µs: For additional writing
E
(max)), the following relationship applies between the
Rev.4.00 Sep. 07, 2007 Page 911 of 1210
REJ09B0245-0400
P
(max)).
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