D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 155
D13007VX13V
Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of D13007VX13V
Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Bits 7 and 6⎯Multiplex Control 1 and 0 (MXC1, MXC0): These bits select the row
address/column address multiplexing method used on the DRAM interface. In burst operation, the
row address used for comparison is determined by the setting of these bits and the bus width of the
relevant area set in ABWCR.
Bit 7
MXC1
0
1
Bit 5⎯CAS Output Pin Select (CSEL): Selects the UCAS and LCAS output pins when areas 2
to 5 are designated as DRAM space.
Bit 5
CSEL
0
1
Bit 6
MXC0
0
1
0
1
Description
Column address: 8 bits
Compared address:
Modes 1, 2
Modes 3, 4
Column address: 9 bits
Compared address:
Modes 1, 2
Modes 3, 4
Column address: 10 bits
Compared address:
Modes 1, 2
Modes 3, 4
Illegal setting
Description
PB4 and PB5 selected as UCAS and LCAS output pins
HWR and LWR selected as UCAS and LCAS output pins
8-bit access space
16-bit access space
8-bit access space
16-bit access space
8-bit access space
16-bit access space
8-bit access space
16-bit access space
8-bit access space
16-bit access space
8-bit access space
16-bit access space
Rev.5.00 Sep. 12, 2007 Page 125 of 764
A
A
A
A
A
A
A
A
A
A
A
A
19
19
23
23
19
19
23
23
19
19
23
23
to A
to A
to A
to A
to A
to A
to A
to A
to A
to A
to A
to A
REJ09B0396-0500
6. Bus Controller
8
9
8
9
9
10
9
10
10
11
10
11
(Initial value)
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