MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 116

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EEPROM Memory
8.8 Programming EEDIVH and EEDIVL Registers
8.8.1 Normal mode
8.8.2 Special mode
Technical Data
116
CAUTION:
The EEDIVH and EEDIVL registers must be correctly set according to
the oscillator frequency before any EEPROM location can be
programmed or erased.
The EEDIVH and EEDIVL registers are write once in normal mode.
Upon system reset, the application program is required to write the
correct divider value to EEDIVH and EEDIVL registers based on the
oscillator frequency. After the first write, the value in the EEDIVH and
EEDIVL registers is locked from being overwritten until the next reset.
The EEPROM is then ready for standard program/erase routines.
Runaway code can possibly corrupt the EEDIVH and EEDIVL registers
if they are not initialized for the write once.
If an existing application code with EEPROM program/erase routines is
already fixed and the system is already operating at a known oscillator
frequency, it is recommended to initialize the shadow word with the
corresponding EEDIVH and EEDIVL values in special mode. The
shadow word initializes EEDIVH and EEDIVL registers upon system
reset to ensure software compatibility with existing code. Initializing the
EEDIVH and EEDIVL registers in special modes (SMODN=0) is
accomplished by the following steps.
1. Write correct divider value to EEDIVH and EEDIVL registers
2. Remove the SHADOW word protection by clearing SHPROT bit in
3. Clear NOSHW bit in EEMCR register to make the SHADOW word
4. Program bits 1 and 0 of the high byte of the SHADOW word and
based on the oscillator frequency as per Table17.
EEPROT register.
visible at $0FC0-$0FC1.
bits 7 to 0 of the low byte of the SHADOW word like a regular
EEPROM Memory
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor