MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 133

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
KWIFG — Key Wake-up Port G Flag Register
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RESET:
Bit 7
0
0
KWIFG6
6
0
Each flag, except bit 6, is set by a falling edge on its associated input pin.
To clear the flag, write one to the corresponding bit in KWIFG.
Read and write anytime
Bit 7 always reads zero.
KWIFG6 — Key Wake-up Port G Flag 6
KWIFG[5:0] — Key Wake-up Port G Flags
Depending on WI2CE bit in KWIEG register, KWIFG6 flags either
falling edge or I2C Start condition.
0 = Falling edge on the associated bit or I2C Start condition has not
1 = Falling edge on the associated bit or I2C Start condition has
0 = Falling edge on the associated bit has not occurred
1 = Falling edge on the associated bit has occurred (an interrupt
KWIFG5
5
0
occurred
occurred (an interrupt will occur if the associated enable bit is set)
will occur if the associated enable bit is set).
I/O Ports with Key Wake-up
KWIFG4
4
0
KWIFG3
3
0
KWIFG2
2
0
Key Wake-up and Port Registers
KWIFG1
1
0
I/O Ports with Key Wake-up
KWIFG0
Bit 0
0
Technical Data
$002E
133

Related parts for MC912D60CCPVE