MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 15

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Technical Data — MC68HC912D60A
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Figure
1-1
1-2
2-1
3-1
3-2
3-3
3-4
3-5
3-6
5-1
6-1
10-1 STOP Key Wake-up Filter (falling edge trigger) timing. . . . . . 135
11-1 Internal Clock Relationships . . . . . . . . . . . . . . . . . . . . . . . . . . 139
11-2 PLL Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
11-3 Clock Loss during Normal Operation . . . . . . . . . . . . . . . . . . . 144
11-4 No Clock at Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . 146
11-5 STOP Exit and Fast STOP Recovery . . . . . . . . . . . . . . . . . . . 149
11-6 Clock Generation Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
11-7 Clock Chain for SCI0, SCI1, RTI, COP. . . . . . . . . . . . . . . . . . 164
11-8 Clock Chain for ECT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
11-9 Clock Chain for MSCAN, SPI, ATD0, ATD1 and BDM . . . . . . 166
12-1 MC68HC912D60A Colpitts Oscillator Architecture. . . . . . . . . 177
12-2 MC68HC912D60C Colpitts Oscillator Architecture. . . . . . . . . 180
12-3 MC68HC912D60C Crystal with DC Blocking Capacitor . . . . . 192
12-4 MC68HC912D60P Pierce Oscillator Architecture. . . . . . . . . . 195
13-1 Block Diagram of PWM Left-Aligned Output Channel . . . . . . 208
13-2 Block Diagram of PWM Center-Aligned Output Channel . . . . 209
13-3 PWM Clock Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
14-1 Timer Block Diagram in Latch Mode. . . . . . . . . . . . . . . . . . . .225
14-2 Timer Block Diagram in Queue Mode. . . . . . . . . . . . . . . . . . . 226
MC68HC912D60A 112-pin QFP Block Diagram . . . . . . . . . . . 29
MC68HC912D60A 80-pin QFP Block Diagram . . . . . . . . . . . . 30
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Pin Assignments in 80-pin QFP for MC68HC912D60A . . . . . . 40
80-pin QFP Mechanical Dimensions (case no841B) . . . . . . . . 41
PLL Loop FIlter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . 43
External Oscillator Connections . . . . . . . . . . . . . . . . . . . . . . . .45
MC68HC912D60A Memory Map . . . . . . . . . . . . . . . . . . . . . . . 83
Access Type vsBus Control Pins . . . . . . . . . . . . . . . . . . . . . . . 86
Pin Assignments in 112-pin TQFP for MC68HC912D60A . . . . 38
112-pin TQFP Mechanical Dimensions (case no987) . . . . . . . 39
List of Figures
Title
List of Figures
Technical Data
Page
15

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