MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 156

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Clock Functions
11.6.15 PLL Register Descriptions
SYNR — Synthesizer Register
REFDV — Reference Divider Register
CGTFLG — Clock Generator Test Register
Technical Data
156
RESET:
RESET:
RESET:
TSTOUT7
Bit 7
Bit 7
Bit 7
0
0
0
0
0
TSTOUT6
6
0
0
6
0
0
6
0
Read anytime, write anytime, except when BCSP = 1 (PLL selected as
bus clock).
If the PLL is on, the count in the loop divider (SYNR) register effectively
multiplies up the bus frequency from the PLL reference frequency by
SYNR + 1. Internally, SYSCLK runs at twice the bus frequency. Caution
should be used not to exceed the maximum rated operating frequency
for the CPU.
Read anytime, write anytime, except when BCSP = 1.
The reference divider bits provides a finer granularity for the PLL
multiplier steps. The reference frequency is divided by REFDV + 1.
Always reads zero, except in test modes.
TSTOUT5
SYN5
5
0
5
0
0
5
0
TSTOUT4
SYN4
Clock Functions
4
0
4
0
0
4
0
TSTOUT3
SYN3
3
0
3
0
0
3
0
TSTOUT2
REFDV2
SYN2
2
0
2
0
2
0
TSTOUT1
REFDV1
SYN1
MC68HC912D60A — Rev. 3.1
1
0
1
0
1
0
Freescale Semiconductor
TSTOUT0
REFDV0
SYN0
Bit 0
Bit 0
Bit 0
0
0
0
$003A
$0038
$0039

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