MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 157

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
PLLFLG — PLL Flags
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RESET:
LOCKIF
Bit 7
0
LOCK
6
0
Read anytime, refer to each bit for write conditions.
LOCKIF — PLL Lock Interrupt Flag
LOCK — Locked Phase Lock Loop Circuit
LHIF — Limp-Home Interrupt Flag
LHOME — Limp-Home Mode Status
For Limp-Home mode, see
To clear the flag, write one to this bit in PLLFLG. Cleared in limp-home
mode.
Regardless of the bandwidth control mode (automatic or manual):
Write has no effect on LOCK bit. This bit is cleared in limp-home mode as
the lock detector cannot operate without the reference frequency.
To clear the flag, write one to this bit in PLLFLG.
0 = No change in LOCK bit.
1 = LOCK condition has changed, either from a locked state to an
0 = PLL VCO is not within the desired tolerance of the target
1 = After the phase lock loop circuit is turned on, indicates the PLL
0 = No change in LHOME bit.
1 = LHOME condition has changed, either entered or exited limp-
0 = MCU is operating normally, with EXTALi clock available for
1 = Loss of reference clock. CGM delivers PLL VCO limp-home
5
0
0
unlocked state or vice versa.
frequency.
VCO is within the desired tolerance of the target frequency.
home mode.
generating clocks or as PLL reference.
frequency to the MCU.
Clock Functions
4
0
0
Limp-Home and Fast STOP Recovery
3
0
0
Limp-Home and Fast STOP Recovery modes
2
0
0
LHIF
1
0
LHOME
Bit 0
0
Clock Functions
Technical Data
modes.
$003B
157

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