MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 19

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Technical Data — MC68HC912D60A
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Table
1-1
1-2
2-1
2-2
3-1
3-2
3-3
3-4
4-1
5-1
5-2
5-3
5-4
8-1
8-2
8-3
8-4
9-1
9-2
11-1 Summary of STOP Mode Exit Conditions. . . . . . . . . . . . . . . . 155
11-2 Summary of Pseudo STOP Mode Exit Conditions . . . . . . . . . 155
11-3 Clock Monitor Time-Outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
11-4 Real Time Interrupt Rates. . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
11-5 COP Watchdog Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .172
13-1 Clock A and Clock B Prescaler. . . . . . . . . . . . . . . . . . . . . . . . 212
13-2 PWM Left-Aligned Boundary Conditions . . . . . . . . . . . . . . . . 222
13-3 PWM Center-Aligned Boundary Conditions . . . . . . . . . . . . . . 222
14-1 Compare Result Output Action . . . . . . . . . . . . . . . . . . . . . . . . 238
14-2 Edge Detector Circuit Configuration . . . . . . . . . . . . . . . . . . . .238
Device Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Development Tools Ordering Information. . . . . . . . . . . . . . . . . 28
M68HC12 Addressing Mode Summary . . . . . . . . . . . . . . . . . . 34
Summary of Indexed Operations . . . . . . . . . . . . . . . . . . . . . . . 35
MC68HC912D60A Power and Ground Connection Summary . 44
MC68HC912D60A Signal Description Summary . . . . . . . . . . . 50
MC68HC912D60A Port Description Summary . . . . . . . . . . . . . 59
Port Pull-Up, Pull-Down and Reduced Drive Summary . . . . . . 60
MC68HC912D60A Register Map . . . . . . . . . . . . . . . . . . . . . . . 62
Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
RFSTR Stretch Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . 82
EXSTR Stretch Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . 82
EEDIV Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
1K byte EEPROM Block Protection . . . . . . . . . . . . . . . . . . . . 112
Erase Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Interrupt Vector Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Stacking Order on Entry to Interrupts . . . . . . . . . . . . . . . . . . . 128
Mapping Precedence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Shadow word mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
List of Tables
Title
List of Tables
Technical Data
Page
19

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