MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 200

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Oscillator
12.5.2.2 Gain Margin
Technical Data
200
NRM measurement techniques can also generate misleading results
when applied to Automatic Level Control (ALC) style oscillator circuits
such as the D60x/Dx128x. Many NRM methods slowly increase series
resistance until oscillation stops. ALC-style oscillators reduce the gain of
the oscillator circuit after start-up to reduce current, so if the oscillator
tends to have more gain than optimum it will be more tolerant of
additional resistance after start-up than it will during the start-up process.
This means that NRM figures may be optimistic unless the method
verifies the NRM value by attempting to start the oscillator with the
additional resistance in-place. Worse, this phenomenon exaggerates
the difference between best- and worst-case NRM curves.
The Gain Margin of the oscillator indicates the amount the gain of the
oscillator can vary while maintaining oscillation. Specifically, Gain
Margin is:
Gain Margin = MIN(gain/minimum required gain, maximum allowed
gain/gain)
Just like NRM, Gain Margin may be dominated by either too much or too
little oscillator gain and an increase in gain may not increase Gain
Margin. Gain Margin is theoretically related to NRM since the maximum
allowed gain is (approximately) inversely proportional to ESR, and the
minimum required gain is (approximately) proportional to ESR, leaving
Gain Margin (approximately) inversely proportional to ESR.
The preferred method for specifying the oscillator, given a set of load
capacitor values, is to determine the maximum allowed ESR while
maintaining a worst-case Gain Margin of 2. Since Gain Margin is
proportional to ESR, this means the empirically measured NRM at the
worst-case point would be approximately twice the maximum allowed
ESR. However, since typical NRM is likely to be higher and most
measurement techniques do not account for ALC effects, actual NRM
measurements are likely to be much higher.
Oscillator
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor