MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 201

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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MC912D60CCPVE
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12.5.2.3 Optimizing Component Values
12.5.2.4 Key Parameters
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
The maximum ESR possible (given a worst-case Gain Margin of 2) is not
the optimum operating point. In some cases, the frequency accuracy of
the oscillator is important and in other cases satisfying the traditional
NRM measurement technique is important.
If frequency accuracy is important, the total load capacitance (the
combination of the load capacitors and their associated parasitics)
should be equal (or close to equal) to the rated load capacitance of the
resonator. Provided the resultant load capacitors yield a maximum
allowed ESR greater than the maximum ESR of the crystal (while
maintaining the worst case Gain Margin of 2), this is an acceptable
operating point. If the maximum allowed ESR is not high enough, the
closest possible components with high enough ESR should be chosen.
Similarly, if meeting a traditional NRM optimization criteria is important,
then the components determined by this method are acceptable if the
same components yield a maximum allowed ESR greater than the
maximum ESR of the crystal while maintaining the worst case Gain
Margin of 2. There is no guarantee that components chosen through
traditional NRM optimization techniques will yield acceptable results
across all expected variations.
The following items are of critical importance to the operation of the
oscillator:
EXTAL–VSS capacitor value — The value of the component
plus external (board) parasitic in excess of 1.0pF between EXTAL
and VSS.
XTAL–VSS capacitor value — The value of the component plus
external (board) parasitic in excess of 1.0pF between XTAL and
VSS.
Maximum Shunt Capacitance — The maximum value of the
resonator’s shunt capacitance (C0) plus the external (board)
parasitics in excess of 0.1pF from EXTAL to XTAL.
Oscillator
MC68HC912D60P Pierce Oscillator Specification
Technical Data
Oscillator
201

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