MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 206

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
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Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
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Oscillator
12.5.4 MC68HC912D60P Guidelines
Technical Data
206
NOTE:
NOTE:
Proper and robust operation of the oscillator circuit requires excellent
board layout design practice. Poor layout of the application board can
contribute to EMC susceptibility, noise generation, slow starting
oscillators, and reaction to noise on the clock input buffer. In addition to
published errata for the MC68HC912D60A, the following guidelines
must be followed or failure in operation may occur.
An increase in the EXTAL–VSS or XTAL–VSS parasitic as a result of
reducing EXTAL–XTAL parasitic is acceptable provided the component
values are reduced by the appropriate value.
EXTAL and XTAL routing resistances are less important than
capacitances. Using minimum width traces is an acceptable trade-off to
reduce capacitance.
Minimize Capacitance between EXTAL and XTAL traces —
The Pierce oscillator architecture is sensitive to capacitance in
parallel with the resonator (from EXTAL to XTAL). To reduce this
capacitance, run a shield trace (connected to VSS) between
EXTAL and XTAL as far as possible.
Shield all oscillator components from all noisy traces. If the
VSS used for shielding is not identical to the oscillator reference,
it must be considered a noisy signal.
Keep the VSSPLL pin and the VSS reference to the oscillator
as identical as possible. Impedance between these signals must
be minimum.
Observe best practice supply bypassing on all MCU power
pins. The oscillator’s supply reference is VDD, not VDDPLL.
Account for XTAL–VSS and EXTAL–VSS parasitics in
component values. The specified component values assume a
maximum parasitic capacitance of 1pF for these pins.
Minimize XTAL and EXTAL routing lengths to reduce EMC
issues.
Oscillator
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor

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