MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 236

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Capture Timer
TSCR — Timer System Control Register
Technical Data
236
RESET:
Bit 7
TEN
0
TSWAI
6
0
Read or write anytime.
TEN — Timer Enable
TSWAI — Timer Module Stops While in Wait
TSBCK — Timer and Modulus Counter Stop While in Background Mode
TFFCA — Timer Fast Flag Clear All
If for any reason the timer is not active, there is no ÷64 clock for the
pulse accumulator since the E÷64 is generated by the timer prescaler.
TSWAI also affects pulse accumulators and modulus down counters.
TBSCK does not stop the pulse accumulator.
0 = Disables the main timer, including the counter. Can be used for
1 = Allows the timer to function normally.
0 = Allows the timer module to continue running during wait.
1 = Disables the timer module when the MCU is in the wait mode.
0 = Allows the timer and modulus counter to continue running while
1 = Disables the timer and modulus counter whenever the MCU is
0 = Allows the timer flag clearing to function normally.
1 = For TFLG1($8E), a read from an input capture or a write to the
TSBCK
5
0
reducing power consumption.
Timer interrupts cannot be used to get the MCU out of wait.
in background mode.
in background mode. This is useful for emulation.
output compare channel ($90–$9F) causes the corresponding
channel flag, CnF, to be cleared. For TFLG2 ($8F), any access
to the TCNT register ($84, $85) clears the TOF flag. Any
access to the PACN3 and PACN2 registers ($A2, $A3) clears
the PAOVF and PAIF flags in the PAFLG register ($A1). Any
access to the PACN1 and PACN0 registers ($A4, $A5) clears
the PBOVF flag in the PBFLG register ($B1). Any access to the
Enhanced Capture Timer
TFFCA
4
0
3
0
2
0
MC68HC912D60A — Rev. 3.1
1
0
Freescale Semiconductor
Bit 0
0
$0086