MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 296

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Interconnect Bus
16.7 MI Bus clock rate
16.8 SCI0/MI Bus registers
SC0BDH — MI Bus Clock Rate Control Register
SC0BDL — MI Bus Clock Rate Control Register
Technical Data
296
RESET:
RESET:
BTST
SBR7
Bit 7
Bit 7
0
0
BSPL
SBR6
6
0
6
0
The MI Bus clock rate is set via the SCI baud registers. To use the
MI Bus, the MCLK clock frequency that drives the SCI clock generator
must be selected to match the minimum resolution of the MI Bus logic.
This is expressed by the following formula:
MCLK = 16 • n • (2 • Push_field_bit_rate) = 16 • n • 40kHz = n • 640kHz
where ‘n’ is an integer and 20kHz is the minimum Push field bit rate for
the MI Bus. Values for MCLK could be 640kHz,1280kHz, 1920kHz, …,
n • 640kHz. The value ‘n’ is the modulus for the MI Bus baud register.
MCLK may be the output of the PLL circuit or it may be the EXTAL/2
input of the MCU. Refer to
MI Bus operation is controlled by the same group of registers as is used
for the SCI. However the functions of some of the bits are modified when
in MI Bus mode. A description of the registers, as applicable to the
MI Bus function, is given here.
In MI Bus mode, bits that have no meaning are reserved by Freescale,
and are not described.
BRLD
SBR5
5
0
5
0
Freescale Interconnect Bus
SBR12
SBR4
4
0
4
0
SBR11
SBR3
Clock Divider
3
0
3
0
SBR10
SBR2
2
0
2
1
Chains.
SBR9
SBR1
MC68HC912D60A — Rev. 3.1
1
0
1
0
Freescale Semiconductor
SBR8
SBR0
Bit 0
Bit 0
0
0
High
Low
$00C0
$00C1