MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 331

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
SLPAK — SLEEP Mode Acknowledge
SLPRQ — SLEEP request
SFTRES— SOFT_RESET
This flag indicates whether the msCAN12 is in module internal
SLEEP Mode. It shall be used as a handshake for the SLEEP Mode
request (see
This flag allows to request the msCAN12 to go into an internal power-
saving mode (see
When this bit is set by the CPU, the msCAN12 immediately enters the
SOFT_RESET state. Any ongoing transmission or reception is
aborted and synchronisation to the bus is lost.
The following registers will go into and stay in the same state as out
of hard reset: CMCR0, CRFLG, CRIER, CTFLG, CTCR.
The registers CMCR1, CBTR0, CBTR1, CIDAC, CIDAR0–3,
CIDMR0–3 can only be written by the CPU when the msCAN12 is in
SOFT_RESET state. The values of the error counters are not affected
by SOFT_RESET.
When this bit is cleared by the CPU, the msCAN12 will try to
synchronize to the CAN bus: If the msCAN12 is not in BUSOFF state
it will be synchronized after 11 recessive bits on the bus; if the
msCAN12 is in BUSOFF state it continues to wait for 128 occurrences
of 11 recessive bits.
Clearing SFTRES and writing to other bits in CMCR0 must be in
separate instructions.
0 = Wake-up – The msCAN12 is not in SLEEP Mode.
1 = SLEEP – The msCAN12 is in SLEEP Mode.
0 = Wake-up – The msCAN12 will function normally.
1 = SLEEP request – The msCAN12 will go into SLEEP Mode
0 = Normal operation
1 = msCAN12 in SOFT_RESET state.
when the CAN bus is idle, i.e. the module is not receiving a
message and all transmit buffers are empty.
msCAN12 SLEEP
MSCAN Controller
msCAN12 SLEEP
Mode).
Programmer’s Model of Control Registers
Mode).
MSCAN Controller
Technical Data
331

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