MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 337

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
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Part Number:
MC912D60CCPVE
Manufacturer:
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Quantity:
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MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
WARNING:
NOTE:
BOFFIF — BUSOFF Interrupt Flag
OVRIF — Overrun Interrupt Flag
RXF — Receive Buffer Full
To ensure data integrity, no registers of the receive buffer shall be read
while the RXF flag is cleared.
The CRFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
This flag is set when the msCAN12 goes into BUSOFF status, due to
the Transmit Error counter exceeding 255. It cannot be cleared before
the msCAN12 has monitored 128 times 11 consecutive recessive bits
on the bus. If not masked, an Error interrupt is pending while this flag
is set.
This flag is set when a data overrun condition occurrs. If not masked,
an Error interrupt is pending while this flag is set.
The RXF flag is set by the msCAN12 when a new message is
available in the foreground receive buffer. This flag indicates whether
the buffer is loaded with a correctly received message. After the CPU
has read that message from the receive buffer, the RXF flag must be
handshaken (cleared) in order to release the buffer. A set RXF flag
prohibits the exchange of the background receive buffer into the
foreground buffer. If not masked, a Receive interrupt is pending while
this flag is set.
0 = No BUSOFF status has been reached.
1 = msCAN12 went into BUSOFF status.
0 = No data overrun has occurred.
1 = A data overrun has been detected.
0 = The receive buffer is released (not full).
1 = The receive buffer is full. A new message is available.
MSCAN Controller
Programmer’s Model of Control Registers
MSCAN Controller
Technical Data
337

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