MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 34

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Central Processing Unit
Technical Data
34
(auto post-decrement)
(D accumulator offset)
(auto post-increment)
(auto pre-decrement)
(auto pre-increment)
(accumulator offset)
Addressing Mode
Indexed-Indirect
Indexed-Indirect
(16-bit offset)
(16-bit offset)
(5-bit offset)
(9-bit offset)
Immediate
Extended
Inherent
Relative
Indexed
Indexed
Indexed
Indexed
Indexed
Indexed
Indexed
Indexed
Direct
Table 2-1. M68HC12 Addressing Mode Summary
INST [oprx16,xysp]
supplied operands)
INST oprx16,xysp
INST oprx5,xysp
INST oprx3,–xys
INST oprx3,+xys
INST oprx3,xys–
INST oprx3,xys+
INST oprx9,xysp
Source Format
INST abd,xysp
INST [D,xysp]
(no externally
INST #opr16i
INST opr16a
INST #opr8i
INST opr8a
INST rel16
INST rel8
INST
or
or
Central Processing Unit
Abbreviation
[D,IDX]
[IDX2]
IDX1
IDX2
IMM
EXT
REL
INH
DIR
IDX
IDX
IDX
IDX
IDX
IDX
Operand is the lower 8-bits of an address in
(lower 8-bits of offset in one extension byte)
5-bit signed constant offset from x, y, sp, or
9-bit signed constant offset from x, y, sp, or
Operand is included in instruction stream
Auto post-decrement x, y, or sp by 1 ~ 8
16-bit constant offset from x, y, sp, or pc
16-bit constant offset from x, y, sp, or pc
An 8-bit or 16-bit relative offset from the
Auto post-increment x, y, or sp by 1 ~ 8
Auto pre-decrement x, y, or sp by 1 ~ 8
Indexed with 8-bit (A or B) or 16-bit (D)
Operands (if any) are in CPU registers
current pc is supplied in the instruction
Auto pre-increment x, y, or sp by 1 ~ 8
accumulator offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
(16-bit offset in two extension bytes)
8- or 16-bit size implied by context
x, y, sp, or pc plus the value in D
Pointer to operand is found at...
Pointer to operand is found at...
Operand is a 16-bit address
the range $0000 – $00FF
MC68HC912D60A — Rev. 3.1
Description
Freescale Semiconductor
pc
pc