MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 374

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ATD0TESTL/ATD1TESTL — ATD Test Register
ATD0TESTH/ATD1TESTH — ATD Test Register
Analog-to-Digital Converter
18.9.6 ATDTEST Module Test Register (ATDTEST)
Technical Data
374
RESET:
RESET:
SAR1
SAR9
Bit 7
Bit 7
0
0
SAR0
SAR8
6
0
6
0
The test registers implement various special (test) modes used to test
the ATD module. The reset bit in ATDTEST1 is always read/write. The
SAR (successive approximation register) can always be read but only
written in special (test) mode.
The functions implemented by the test registers are reserved for factory
test.
SAR[9:0] — Successive Approximation Register
RST — Test Mode Reset Bit
This ten bit value represents the contents of the AD machine’s
successive approximation register. This value can always be read. It
can only be written in special (test) mode. Note that ATDTEST0 acts
as a ten bit register since the entire SAR is read/written when
accessing this address.
When set, this bit causes the ATD module to reset itself. This sets all
registers to their reset state (note the reset state of the reset bit is
zero), the current conversion and conversion sequence are aborted,
pending interrupts are cleared, and the module is placed in an idle
mode.
0 = No reset
1 = Reset the ATD module
SAR7
RST
5
0
5
0
Analog-to-Digital Converter
SAR6
4
0
4
0
0
SAR5
3
0
3
0
0
SAR4
2
0
2
0
0
SAR3
MC68HC912D60A — Rev. 3.1
1
0
1
0
0
Freescale Semiconductor
SAR2
Bit 0
Bit 0
0
0
0
$0069/$01E9
$0068/$01E8