MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 376

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADRx0H — A/D Converter Result Register 0
ADRx0L — A/D Converter Result Register 0
ADRx1H — A/D Converter Result Register 1
ADRx1L — A/D Converter Result Register 1
ADRx2H — A/D Converter Result Register 2
ADRx2L — A/D Converter Result Register 2
ADRx3H — A/D Converter Result Register 3
ADRx3L — A/D Converter Result Register 3
ADRx4H — A/D Converter Result Register 4
ADRx4L — A/D Converter Result Register 4
ADRx5H — A/D Converter Result Register 5
ADRx5L — A/D Converter Result Register 5
ADRx6H — A/D Converter Result Register 6
ADRx6L — A/D Converter Result Register 6
ADRx7H — A/D Converter Result Register 7
ADRx7L — A/D Converter Result Register 7
Analog-to-Digital Converter
18.9.8 ADRx A/D Conversion Result Registers (ADR0-15)
Technical Data
376
ADRxxH
ADRxxL
RESET:
Bit 15
Bit 7
0
Bit 6
6
0
The A/D conversion results are stored in 8 result registers. These
registers are designated ADR0 through ADR7.
The result data is formatted using the DJM control bit in ATDCTL2. For
8-bit result data, the result data maps between the high (left justified) and
low (right justified) order bytes of the result register. For 10-bit result
data, the result data maps between bits 6-15 (left justified) and bits 0-9
(right justified) of the result register.
These registers are normally read-only.
5
0
0
Analog-to-Digital Converter
4
0
0
3
0
0
2
0
0
MC68HC912D60A — Rev. 3.1
1
0
0
Freescale Semiconductor
Bit 8
0
0
$007A/$01FA
$007B/$01FB
$007C/$01FC
$007D/$01FD
$007E/$01FE
$007F/$01FF
$0070/$01F0
$0071/$01F1
$0072/$01F2
$0073/$01F3
$0074/$01F4
$0075/$01F5
$0076/$01F6
$0077/$01F7
$0078/$01F8
$0079/$01F9