MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 89

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
PORTE — Port E Register
DDRE — Port E Data Direction Register
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RESET:
Function
RESET:
Alt. Pin
ECLK or
DDE7
DBE or
Bit 7
BIT 7
PE7
CAL
0
IPIPE1 or
CGMTST
MODB or
DDE6
PE6
6
0
6
This register is associated with external bus control signals and interrupt
inputs, including data bus enable (DBE), mode select (MODB/IPIPE1,
MODA/IPIPE0), ECLK, size (LSTRB), read/write (R/W), IRQ, and XIRQ.
When the associated pin is not used for one of these specific functions,
the pin can be used as general-purpose I/O. The port E assignment
register (PEAR) selects the function of each pin. DDRE determines the
primary direction of each port E pin when configured to be general-
purpose I/O.
Some of these pins have software selectable pull-ups (DBE, LSTRB,
R/W, IRQ, and XIRQ). A single control bit enables the pull-ups for all
these pins which are configured as inputs.
This register is not in the map in peripheral mode or expanded modes
when the EME bit is set.
Read and write anytime.
This register determines the primary direction for each port E pin
configured as general-purpose I/O.
MODA or
DDE5
IPIPE0
PE5
5
0
5
Bus Control and Input/Output
DDE4
ECLK
PE4
4
0
4
BDTAGL or
LSTRB or
TAGLO
DDE3
PE3
3
0
3
DDE2
PE2
R/W
2
0
2
PE1
IRQ
1
0
0
Bus Control and Input/Output
1
XIRQ
BIT 0
Bit 0
PE0
0
0
Technical Data
Registers
$0008
$0009
89

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