D12674RVFQ33 Renesas Electronics America, D12674RVFQ33 Datasheet - Page 72
D12674RVFQ33
Manufacturer Part Number
D12674RVFQ33
Description
IC H8S MCU ROMLESS 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of D12674RVFQ33
Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33
HD6412674RVFQ33
HD6412674RVFQ33
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
D12674RVFQ33V
Manufacturer:
VISHAY
Quantity:
2 696
Company:
Part Number:
D12674RVFQ33V
Manufacturer:
Renesas Electronics America
Quantity:
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Section 2 Instruction Descriptions
2.2.5 (1)
ANDC (AND Control register)
Operation
CCR
Assembly-Language Format
ANDC #xx:8, CCR
Operand Size
Byte
Description
This instruction ANDs the contents of the condition-code register (CCR) with immediate data and
stores the result in the condition-code register. No interrupt requests, including NMI, are accepted
immediately after execution of this instruction.
Operand Format and Number of States Required for Execution
Notes
Rev. 4.00 Feb 24, 2006 page 56 of 322
REJ09B0139-0400
Immediate
Addressing
Mode
#IMM
ANDC
CCR
Mnemonic
ANDC
#xx:8, CCR
Operands
1st byte
0
6
Condition Code
I:
UI: Stores the corresponding bit of the result.
H: Stores the corresponding bit of the result.
U: Stores the corresponding bit of the result.
N: Stores the corresponding bit of the result.
Z: Stores the corresponding bit of the result.
V: Stores the corresponding bit of the result.
C: Stores the corresponding bit of the result.
2nd byte
Instruction Format
Stores the corresponding bit of the result.
IMM
I
UI H
3rd byte
U
Logical AND with CCR
N
4th byte
Z
V
States
No. of
C
1
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