R5F61622N50FPV Renesas Electronics America, R5F61622N50FPV Datasheet - Page 541

• Manufacturer Part Number: R5F61622N50FPV
• Description: MCU 24KB FLASH 256K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61622N50FPV

• Core Size: 16/32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: H8SX
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b, 6x16b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• No. Of I/o's: 74
• Ram Memory Size: 24KB
• Cpu Speed: 50MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

(2)
A compare match signal is generated in the final state in which TCNT and TGR match (the point
at which the count value matched by TCNT is updated). When a compare match signal is
generated, the output value set in TIOR is output at the output compare output pin (TIOC pin).
After a match between TCNT and TGR, the compare match signal is not generated until the
TCNT input clock is generated.
Figure 12.32 shows output compare output timing.
(3)
Figure 12.33 shows input capture signal timing.
Output Compare Output Timing
Input Capture Signal Timing
Pφ
Input capture input
Input capture signal
TCNT
TGR
Pφ
TCNT input clock
TCNT
TGR
Compare match
signal
TIOC pin
Figure 12.33 Input Capture Input Signal Timing
Figure 12.32 Output Compare Output Timing
N
N
N
N + 1
N
N + 1
Rev. 2.00 Sep. 16, 2009 Page 511 of 1036
Section 12 16-Bit Timer Pulse Unit (TPU)
N + 2
N + 2
REJ09B0414-0200