R5F61622N50FPV Renesas Electronics America, R5F61622N50FPV Datasheet - Page 913
R5F61622N50FPV
Manufacturer Part Number
R5F61622N50FPV
Description
MCU 24KB FLASH 256K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61622N50FPV
Core Size
16/32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
H8SX
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b, 6x16b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
No. Of I/o's
74
Ram Memory Size
24KB
Cpu Speed
50MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61622N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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[Legend]
Notes: 1. NMI, IRQ0 to IRQ15, 8-bit timer interrupts, and watchdog timer interrupts.
From any state, a transition to hardware standby mode occurs when STBY is driven low.
From any state except hardware standby mode, a transition to the reset state occurs when RES is driven low.
Program execution state
2. NMI, and IRQ0 to IRQ15. Note that IRQ is valid only when the corresponding bit in SSIER is set to 1.
3. NMI, and IRQ0-A to IRQ3-A. Note that IRQ is valid only when the corresponding bit in DPSIER is set to 1.
4. The SLPIE bit in SBYCR is cleared to 0.
5. If a conflict between a transition to deep software standby mode and generation of software standby mode
Internal reset state
Note that the 8-bit timer interrupt is valid when the MSTPCRA11 to MSTPCRA8 bit is cleared to 0.
through execution of interrupt exception handling. In this case, a transition to deep software standby mode is not
made. For details, refer to section 24.12, Usage Notes.
clearing source occurs, a mode transition may be made from software standby mode to program execution state
Reset state
RES pin = High
Transition after exception handling
Figure 24.1 Mode Transitions
SLEEP instruction
STBY pin = High
RES pin = Low
SLEEP instruction
SLEEP instruction
External interrupt
External interrupt
All interrupts
Interrupt
(SSBY = 1)
*
1
*
4
*
4
*
*
*
2
3
4
STBY pin = Low
SSBY = 0
SSBY = 0, ACSE = 1
MSTPCR = H'F[C-F]FFFFFF
Rev. 2.00 Sep. 16, 2009 Page 883 of 1036
Program halted state
All-module-clock-
standby mode
standby mode
Deep software
standby mode
(DPSBY = 1
and no external
interrupt
is generated*
Sleep mode
Hardware
stop mode
Software
Section 24 Power-Down Modes
5
)
(DPSBY = 0
and no external
interrupt
is generated)
REJ09B0414-0200
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