R5F64175DFD#U0 Renesas Electronics America, R5F64175DFD#U0 Datasheet - Page 261
R5F64175DFD#U0
Manufacturer Part Number
R5F64175DFD#U0
Description
MCU 384+8KB FLASH 40K 144-LQFP
Manufacturer
Renesas Electronics America
Series
M16C/R32C/100/117r
Datasheet
1.R5F64176DFBU0.pdf
(639 pages)
Specifications of R5F64175DFD#U0
Core Processor
R32C/100
Core Size
16/32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
120
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R32C/117 Group
REJ09B0533-0110
Sep 08, 2010
Figure 17.17 Triangular Wave Modulation Operation
TB2S bit in the
TABSR register
Timer B2
Reload control signal for
timer A1
Timer B2 interrupt
TA4 register
TA41 register
Reload register
Start trigger signal for
timer A4
One-shot pulse of
timer A4
U-phase output
signal
U-phase output
signal
Dead time timer
output
(active high)
(active low)
INV14 = 0
INV14 = 1
Case 1: When INV11 = 1 (three-phase mode 1)
Triangular carrier wave
The above applies to INVC0 = 00XX11XXb (X varies depending on each system) and INVC1 = 010XXXX0b.
The PWM output may vary as follows:
Case 2: When INV11 = 0 (three-phase mode 0)
Notes:
(1)
(1)
(1)
-INV01 = 0 and ICTB2 = 2h (timer B2 interrupt generated every 2nd time the timer B2 underflows), or INV01 = 1,
-The setting of registers TA4 and TA41 are varied every time a timer B2 interrupt is generated,
-Default value of registers IDB0 and IDB1: DU0 = 1, DUB0 = 0, DU1 = 0, DUB1 = 1
-INV01 = 0 and ICTB2 = 1h (timer B2 interrupt generated every time timer B2 underflows)
-TA4 register setting is varied every time a timer B2 interrupt is generated,
-Default value of registers IDB0 and IDB1: DU0 = 1, DUB0 = 0, DU1 = 0, DUB1 = 1
INV00 = 1, and ICTB2 = 1h (timer B2 interrupt generated every time the timer B2 underflows when the reload
control signal for timer A1 is set to 1)
Default value: TA41 = a’, TA4 = a
On the first timer B2 interrupt: TA41 = b’, TA4 = b; the second time: TA41 = c’, TA4 = c
On the third time: DU0 = 1, DUB0 = 0, DU1 = 1, DUB1 = 0
Default value: TA4 = a’
On the first timer B2 interrupt: TA4 = a; 2nd time: TA4 = b’; 3rd time: TA4 = b; 4th time: TA4 = c’; 5th time: TA4 = c
On the sixth time: DU0 = 1, DUB0 = 0, DU1 = 1, DUB1 = 0
(1)
(1)
(1)
1. Internal signal. Refer to the block diagram of three-phase motor control timers.
2. Applied when the INV11 bit in the INV1 register is set to 1 (three-phase mode 1).
(2)
Triangular wave
Signal wave
(2)
U-phase
U-phase
U-phase
U-phase
(2)
Rev.1.10
a’
a’
a
a’
a
a’
a
Dead time
b’
b’
b’
Registers IDB0 and IDB1 are rewritten Rewritten value is
b
b
b
b’
c’
17. Three-phase Motor Control Timers
c’
c’
c
c
c
c’
d’
reflected here
d’
d’
d
d
Page 244 of 604
d
d’
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