DF2372VFQ34V Renesas Electronics America, DF2372VFQ34V Datasheet - Page 1046

• Manufacturer Part Number: DF2372VFQ34V
• Description: IC H8S/2372 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2372VFQ34V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 24 Power-Down Modes
24.2.5
Module stop mode can be set for individual on-chip peripheral modules.
When the corresponding MSTP bit in MSTPCR or EXMSTPCR is set to 1, module operation
stops at the end of the bus cycle and a transition is made to module stop mode. The CPU continues
operating independently.
When the corresponding MSTP bit is cleared to 0, module stop mode is cleared and the module
starts operating at the end of the bus cycle. In module stop mode, the internal states of modules
other than the SCI are retained.
After reset clearance, all modules other than the DMAC, and DTC are in module stop mode.
The module registers which are set in module stop mode cannot be read or written to.
24.2.6
When the ACSE bit in MSTPCRH is set to 1 and module stop mode is set for all the on-chip
peripheral functions controlled by MSTPCR or EXMSTPCR (MSTPCR = H'FFFF, EXMSTPCR
= H'FFFF), or for all the on-chip peripheral functions except the 8-bit timer (MSTPCR = H'FFFE,
EXMSTPCR = H'FFFF), executing a SLEEP instruction while the SSBY bit in SBYCR is cleared
to 0 will cause all the on-chip peripheral functions (except the 8-bit timer and watchdog timer), the
bus controller, and the I/O ports to stop operating, and a transition to be made to all-module-
clocks-stop mode, at the end of the bus cycle.
Operation or halting of the 8-bit timer can be selected by means of the MSTP0 bit.
Rev.7.00 Mar. 18, 2009 page 978 of 1136
REJ09B0109-0700
Module Stop Mode
All-Module-Clocks-Stop Mode
(1) Power supply
Figure 24.4 Hardware Standby Mode Timing when Power Is Supplied
STBY
RES
(2) Reset period
(3) Hardware standby mode