DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 239
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 239 of 1049
- Download datasheet (5Mb)
For setting details, see section 7.3.4, DMA Controller Register (DMACR).
Figure 7-12 shows an example of the setting procedure for normal mode.
Set number of transfers
Set transfer source and
Normal mode setting
transfer destination
Read DMABCRL
Set DMABCRH
Set DMABCRL
Normal mode
Set DMACR
addresses
Figure 7-12 Example of Normal Mode Setting Procedure
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set each bit in DMABCRH.
[2] Set the transfer source address in MARA, and
[3] Set the number of transfers in ETCRA.
[4] Set each bit in DMACRA and DMACRB.
[5] Read DTE = 0 and DTME = 0 in DMABCRL.
[6] Set each bit in DMABCRL.
• Set the FAE bit to 1 to select full address
• Specify enabling or disabling of internal
the transfer destination address in MARB.
• Set the transfer data size with the DTSZ bit.
• Specify whether MARA is to be incremented,
• Clear the BLKE bit to 0 to select normal
• Specify whether MARB is to be incremented,
• Select the activation source with bits DTF3 to
• Specify enabling or disabling of transfer end
• Set both the DTME bit and the DTE bit to 1 to
mode.
interrupt clearing with the DTA bit.
decremented, or fixed, with the SAID and
SAIDE bits.
mode.
decremented, or fixed, with the DAID and
DAIDE bits.
DTF0.
interrupts with the DTIE bit.
enable transfer.
Rev.6.00 Oct.28.2004 page 209 of 1016
REJ09B0138-0600H
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