DF2377RVFQ33 Renesas Electronics America, DF2377RVFQ33 Datasheet - Page 362
DF2377RVFQ33
Manufacturer Part Number
DF2377RVFQ33
Description
IC H8S MCU FLASH 3V 384K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2377RVFQ33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 7 DMA Controller (DMAC)
Bit
12
11
10
9
8
Rev.7.00 Mar. 18, 2009 page 294 of 1136
REJ09B0109-0700
Bit Name
SAE0
DTA1B
DTA1A
DTA0B
DTA0A
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Single Address Enable 0
Specifies whether channel 0B is to be used for
transfer in dual address mode or single address
mode. This bit is invalid in full address mode.
0: Dual address mode
1: Single address mode
Data Transfer Acknowledge 1B
Data Transfer Acknowledge 1A
Data Transfer Acknowledge 0B
Data Transfer Acknowledge 0A
These bits enable or disable clearing when DMA
transfer is performed for the internal interrupt
source selected by the DTF3 to DTF0 bits in
DMACR.
It the DTA bit is set to 1 when DTE = 1, the internal
interrupt source is cleared automatically by DMA
transfer. When DTE = 1 and DTA = 1, the internal
interrupt source does not issue an interrupt request
to the CPU or DTC.
If the DTA bit is cleared to 0 when DTE = 1, the
internal interrupt source is not cleared when a
transfer is performed, and can issue an interrupt
request to the CPU or DTC in parallel. In this case,
the interrupt source should be cleared by the CPU
or DTC transfer.
When DTE = 0, the internal interrupt source issues
an interrupt request to the CPU or DTC regardless
of the DTA bit setting.
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