M30878FJAGP#U5 Renesas Electronics America, M30878FJAGP#U5 Datasheet - Page 138
M30878FJAGP#U5
Manufacturer Part Number
M30878FJAGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M30878FJAGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30878FJAGP#U5M30878FJAGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 114 of 587
Figure 11.4
Interrupt Control Register
b7 b6 b5 b4
NOTES:
1. The BCN0IC register shares the address with the BCN3IC register.
2. The BCN1IC register shares the address with the BCN4IC register.
3. The CAN-associated registers cannot be used in M32C/87B. Only registers CAN0IC to CAN2IC can be used in M32C/87A for
4. The IR bit can be set to 0 only. (Do not set to 1.)
the CAN-associated registers.
The CAN0IC register controls the CAN00 interrupt.
The CAN1IC register controls the CAN01 interrupt.
The CAN2IC register controls the CAN02 interrupt.
The CAN3IC register controls the CAN10 interrupt.
The CAN4IC register controls the CAN11 interrupt.
The CAN5IC register controls the CAN12 interrupt and CAN1 wake-up interrupt.
The IIO09IC register shares the address with the CAN0IC register.
The IIO10IC register shares the address with the CAN1IC register.
The IIO11IC register shares the address with the CAN2IC register.
The IIO0IC register shares the address with the CAN3IC register.
The IIO1IC register shares the address with the CAN4IC register.
The IIO5IC register shares the address with the CAN5IC register.
b3
b2
Interrupt Control Register (1/2)
b1
b0
Bit Symbol
(b7-b4)
ILVL0
ILVL1
ILVL2
Symbol
TA0IC to TA4IC
TB0IC to TB5IC
S0TIC to S4TIC
S0RIC to S4RIC
BCN0IC to BCN4IC
DM0IC to DM3IC
AD0IC
KUPIC
IIO0IC to IIO5IC
IIO6IC to IIO11IC
CAN0IC to CAN2IC
CAN3IC to CAN5IC
IR
−
Interrupt priority level select bits
Interrupt request bit
Unimplemented.
Write 0. Read as undefined value.
Bit Name
(4)
006Ch, 008Ch, 006Eh, 008Eh, 0070h
0094h, 0076h, 0096h, 0078h, 0098h, 0069h
0090h, 0092h, 0089h, 008Bh, 008Dh
0072h, 0074h, 006Bh, 006Dh, 006Fh
0071h, 0091h, 008Fh, 0071h
0068h, 0088h, 006Ah, 008Ah
0073h
0093h
0075h, 0095h, 0077h, 0097h, 0079h, 0099h
007Bh, 009Bh, 007Dh, 009Dh, 007Fh, 0081h
009Dh, 007Fh, 0081h
0075h, 0095h, 0099h
Address
b2 b1 b0
0 0 0: Level 0 (interrupt disabled)
0 0 1: Level 1
0 1 0: Level 2
0 1 1: Level 3
1 0 0: Level 4
1 0 1: Level 5
1 1 0: Level 6
1 1 1: Level 7
0: Interrupt not requested
1: Interrupt requested
(3)
(3)
(1)
, 0091h
Function
(2)
After Reset
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
11. Interrupts
RW
RW
RW
RW
RW
−
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