HD64F2166VTE33 Renesas Electronics America, HD64F2166VTE33 Datasheet - Page 458
HD64F2166VTE33
Manufacturer Part Number
HD64F2166VTE33
Description
IC H8S MCU FLASH 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2166VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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At power-on and transitions to/from software standby mode, use the following procedure to secure
the appropriate clock duty ratio.
At Power-On:
To secure the appropriate clock duty ratio simultaneously with power-on, use the following
procedure.
1. Initially, port input is enabled in the high-impedance state. To fix the potential level, use a
2. Fix the SCK pin to the specified output using the CKE1 bit in SCR.
3. Set SMR and SCMR to enable smart card interface mode.
4. Set the CKE0 bit in SCR to 1 to start clock output.
At Transition from Smart Card Interface Mode to Software Standby Mode:
1. Set the port data register (DR) and data direction register (DDR) corresponding to the SCK
2. Write 0 to the TE and RE bits in SCR to stop transmission/reception. Simultaneously, set the
3. Write 0 to the CKE0 bit in SCR to stop the clock.
4. Wait for one cycle of the serial clock. In the mean time, the clock output is fixed to the
5. Make the transition to software standby mode.
At Transition from Software Standby Mode to Smart Card Interface Mode:
1. Cancel software standby mode.
2. Write 1 to the CKE0 bit in SCR to start clock output. A clock signal with the appropriate duty
Rev. 3.00, 03/04, page 416 of 830
pull-up or pull-down resistor.
pins to the values for the output fixed state in software standby mode.
CKE1 bit to the value for the output fixed state in software standby mode.
specified level with the duty ratio retained.
ratio is then generated.
[1] [2] [3]
Normal operation
Figure 14.35 Clock Stop and Restart Procedure
[4] [5]
Software
standby
[1]
[2]
Normal operation
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