HD64F2166VTE33 Renesas Electronics America, HD64F2166VTE33 Datasheet - Page 505
HD64F2166VTE33
Manufacturer Part Number
HD64F2166VTE33
Description
IC H8S MCU FLASH 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2166VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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15.3.9
ICSMBCR is used to support the System Management Bus (SMBus) specifications. To support
the SMBus specification, SDA output data hold time should be specified in the range of 300 ns to
1000 ns. Table 15.6 shows the relationship between the ICSMBCR setting and output data hold
time.
When the SMBus is not supported, the initial value should not be changed. ICSMBCR is enabled
to access when bit MSTP4 is cleared to 0.
Bit
7
6
5
4
3
2
1
0
Bit Name
SMB5E
SMB4E
SMB3E
SMB2E
SMB1E
SMB0E
FSEL1
FSEL0
I
2
C SMBus Control Register (ICSMBCR)
Initial
Value
All 0
0
0
R/W
R/W
R/W
R/W
Description
SMBus Enable
These bits enable/disable to support the SMBus,
combining with bits FSEL1 and FSEL0. The SMB5E bit
controls IIC_5, the SMB4E bit controls IIC_4, the SMB3E
bit controls IIC_3, the SMB2E bit controls IIC_2, the
SMB1E bit controls IIC_1, the SMB0E bit controls IIC_0.
0: Disables to support the SMBus
1: Enables to support the SMBus
Frequency Selection
These bits must be specified to match the system clock
frequency in order to support the SMBus. For details of the
setting, see table 15.7.
Rev. 3.00, 03/04, page 463 of 830
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