HD64F2166VTE33 Renesas Electronics America, HD64F2166VTE33 Datasheet - Page 739
HD64F2166VTE33
Manufacturer Part Number
HD64F2166VTE33
Description
IC H8S MCU FLASH 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2166VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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The JTAG (Joint Test Action Group) is standardized as an international standard, IEEE Standard
1149.1, and is open to the public as IEEE Standard Test Access Port and Boundary-Scan
Architecture. Although the name of the function is boundary scan and the name of the group who
worked on standardization is the JTAG, the JTAG is commonly used as the name of a boundary
scan architecture and a serial interface to access the devices having the architecture.
This LSI has a boundary scan function (JTAG). Using this function along with other LSIs
facilitates testing a printed-circuit board.
21.1
• Five test pins (ETCK, ETDI, ETDO, ETMS, and ETRST)
• TAP controller
• Six instructions
HUDS000A_000120020900
BYPASS mode
EXTEST mode
SAMPLE/PRELOAD mode
CLAMP mode
HIGHZ mode
IDCODE mode
(These instructions are test modes corresponding to IEEE 1149.1.)
Features
Section 21 Boundary Scan (JTAG)
Rev. 3.00, 03/04, page 697 of 830
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