HD64F2166VTE33 Renesas Electronics America, HD64F2166VTE33 Datasheet - Page 766
HD64F2166VTE33
Manufacturer Part Number
HD64F2166VTE33
Description
IC H8S MCU FLASH 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2166VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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22.2
The PLL multiplier circuit generates a clock of 1 or 4 times the frequency of its input clock. The
PFSEL states and corresponding multiplier values are shown in table 22.5.
Table 22.3 PFSEL and Multipliers
22.3
The medium-speed clock divider divides the system clock (φ), and generates φ/2, φ/4, φ/8, φ/16,
and φ/32 clocks.
22.4
The bus master clock select circuit selects a clock to supply the bus master with either the system
clock (φ) or medium-speed clock (φ/2, φ/4, φ/8, φ/16, or φ/32) by the SCK2 to SCK0 bits in
SBYCR.
22.5
The subclock input circuit controls subclock input from the EXCL pin. To use the subclock, a
32.768-kHz external clock should be input from the EXCL pin. At this time, the P96DDR bit in
P9DDR should be cleared to 0, and the EXCLE bit in LPWRCR should be set to 1.
When the subclock is not used, subclock input should not be enabled.
22.6
To remove noise from the subclock input at the EXCL pin, the subclock is sampled by a divided φ
clock. The sampling frequency is set by the NESEL bit in LPWRCR.
The subclock is not sampled in subactive mode, subsleep mode, or watch mode.
Rev. 3.00, 03/04, page 724 of 830
Crystal Resonator
External Clock
PLL Multiplier Circuit
Medium-Speed Clock Divider
Bus Master Clock Select Circuit
Subclock Input Circuit
Subclock Waveform Forming Circuit
Input Clock (MHz) PFSEL
5 to 25
5 to 8.25
5 to 33
5 to 8.25
1
0
1
0
Multiplier
1
4
1
4
System Clock
(MHz)
5 to 25
20 to 33
5 to 33
20 to 33
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