DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1198

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Main Revisions for This Edition
Page 1170 of 1190
Item
Table 16.5 Bit Rates and SCBRR
Settings (Clocked Synchronous
Mode) (2)
16.4.2 Operation in
Asynchronous Mode
Figure 16.3 Sample Flowchart for
SCIF Initialization
Page
697
711
Revision (See Manual for Details)
Table amended
Note and description amended
[Legend]
Blank: No setting possible, or it is not possible to
—:
Table 16.6 indicates the maximum bit rates in
asynchronous mode when the baud rate generator is
used. Tables 16.7 and 16.8 list the maximum rates
when the external clock input is used (when tscyc =
12 tpcyc*).
Note: * Make sure that the electrical characteristics of
Figure amended
Bit Rate
(bit/s)
250
500
1 k
2.5 k
5 k
10 k
25 k
50 k
100 k
250 k
500 k
1 M
2 M
satisfy the electrical characteristics of the MCU
regardless of the communication partner
device.
Setting possible, but error occurs
this MCU and that of a connected MCU are
satisfied.
33
n
3
3
2
2
1
1
0
0
0
—
—
—
Set RTRG[1:0] and TTRG[1:0] bits
Set TE and RE bits in SCSCR to 1,
PFC setting for external pins used
and set TIE, RIE, and REIE bits
N
255
128
205
102
205
82
164
82
32
—
—
—
in SCFCR, and clear TFRST
and RFRST bits to 0
End of initialization
36
n
—
3
2
2
1
1
0
0
0
0
0
—
SCK, TxD, RxD
N
—
140
224
112
224
89
179
89
35
17
8
—
P (MHz)
R01UH0026EJ0300 Rev. 3.00
38
n
3
2
2
1
1
0
0
0
0
—
—
N
147
237
118
237
94
189
94
37
18
—
—
SH7201 Group
40
n
3
2
2
1
1
0
0
0
0
0
0
Sep 24, 2010
[4]
[5]
N
155
249
124
249
99
199
99
39
19
9
4