DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 392

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 11 Direct Memory Access Controller (DMAC)
11.12
Transfer speeds are calculated as shown below.
(1)
• DMA transfer mode: cycle-stealing transfer mode/pipelined transfer mode
• Transfer unit (one data size): properly aligned 32-bit data
• Operating clock: 60 MHz
• Number of cycles for access to external devices:
(2)
• Cycle-stealing transfer mode
• Pipelined transfer mode
Note: During transfer in the pipelined transfer mode, most read and write cycles overlap.
An example of the calculation of transfer speed is given below.
(a)
Maximum speed of transfer between on-chip RAM (0 wait) and on-chip RAM (0 wait).
• Cycle-stealing transfer mode
• Pipelined transfer mode
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four cycles for reading; and
two cycles for writing.
Pipelined transfer through a single BIU is not possible. See section 11.4.1 (2), Pipelined
Transfer Mode.
Conditions for Calculation
Formulae Used in Calculation
Transfer between On-chip RAM
(data size in unit data transfer) / (number of read cycles + number of write cycles +
one idle cycle) × operating clock
(data size in unit data transfer) / (whichever is larger of number of read or write cycles) ×
operating clock
4 bytes / (1 read cycle + 1 write cycle + 1 idle cycle) × 60 MHz = 79.8 Mbytes/sec
Transfer Speed
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010