DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 416

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
• TIORL_0, TIORL_3, TIORL_4
• TIORU_5, TIORV_5, TIORW_5
Page 388 of 1190
Bit
7 to 4
3 to 0
Bit
7 to 5
4 to 0
Bit Name
IOD[3:0]
IOC[3:0]
Bit Name
⎯
IOC[4:0]
Initial value:
Initial value:
0000
0000
00000
Initial
Value
Initial
Value
All 0
R/W:
R/W:
Bit:
Bit:
R/W
—
R/W
R/W
R/W
R/W
R
R/W
R
7
0
7
0
R/W
—
R
6
IOD[3:0]
0
6
0
Description
I/O Control D0 to D3
Specify the function of TGRD.
See the following tables.
TIORL_0: Table 12.13
TIORL_3: Table 12.17
TIORL_4: Table 12.19
I/O Control C0 to C3
Specify the function of TGRC.
See the following tables.
TIORL_0: Table 12.21
TIORL_3: Table 12.25
TIORL_4: Table 12.27
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
I/O Control C0 to C4
Specify the function of TGRU_5, TGRV_5, and
TGRW_5.
For details, see table 12.28.
R/W
—
R
5
0
5
0
R/W
R/W
4
0
4
0
R/W
R/W
3
0
3
0
IOC[4:0]
R/W
R/W
2
IOC[3:0]
0
2
0
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010