DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 434

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
12.3.4
TCNTCMPCLR is an 8-bit readable/writable register that specifies requests to clear TCNTU_5,
TCNTV_5, and TCNTW_5. The MTU2 has one TCNTCMPCLR in channel 5.
Page 406 of 1190
Bit
7 to 3
2
1
Bit Name
—
CMPCLR5U 0
CMPCLR5V 0
Timer Compare Match Clear Register (TCNTCMPCLR)
Initial value:
Initial
Value
All 0
R/W:
Bit:
—
R/W
R
R/W
R/W
R
7
0
—
R
6
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
TCNT Compare Clear 5U
Enables or disables requests to clear TCNTU_5 at
TGRU_5 compare match or input capture.
0: Disables TCNTU_5 to be cleared to H'0000 at
1: Enables TCNTU_5 to be cleared to H'0000 at
TCNT Compare Clear 5V
Enables or disables requests to clear TCNTV_5 at
TGRV_5 compare match or input capture.
0: Disables TCNTV_5 to be cleared to H'0000 at
1: Enables TCNTV_5 to be cleared to H'0000 at
—
R
5
0
TCNTU_5 and TGRU_5 compare match or input
capture
TCNTU_5 and TGRU_5 compare match or input
capture
TCNTV_5 and TGRV_5 compare match or input
capture
TCNTV_5 and TGRV_5 compare match or input
capture
—
R
4
0
—
R
3
0
CLR5U
R/W
CMP
2
0
CLR5V
R/W
CMP
1
0
CLR5W
CMP
R/W
0
0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010